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(Fwd) Jak pripojit 2CDROM a 2HDD (fwd)



Tady je to pripojeni 2HDD a 2CDROM pro Amigu

                                        Snappy

===================================================================

	Jeste nekdo se zde ozyval, abych sem postnul onen navod jak 
pripojit potazmo 4 IDE zarizeni ke standardnimu A1200 IDE radici. Tak 
tady to je. Bohuzel je mozne pripojit pouze 2*HDD + 2*CDROM. Ovladac 
(tedy demoverze) je na aminetu v disk/cdrom tusim atapi.lha

Planek je tam nekde dole  |
			  |
			  V
			  			Yarda
---------------------------------------------------------------------------
Jaroslav Sedlacek; e-mail:	sedlac30@kirke.zcu.cz
		 		sedlac30@hermes.zcu.cz
				sedlac30@ody.zcu.cz
A1200, Blizard 1230/50Mhz/FPU/8MB Fast Ram, ATAPI 4*speed CDROM,
WDC 21000H 1GB tvrdokol, running AmigaDOS or NetBSD1.1+XWindow
---------------------------------------------------------------------------

---------- Forwarded message ----------
Date: Wed, 20 Mar 1996 10:01:07 +0100 (MET)
From: Geert Uytterhoeven <Geert.Uytterhoeven@cs.kuleuven.ac.be>
To: linux-m68k@phil.uni-sb.de
Subject: Re: L68K: ATAPI CD-ROM driver

Joerg Dorchain wrote:
> Ok, here is a description of the adapter. (According to german
> Copyright law only for research and teaching, not for making
> profit.)

Thus we have

	IDE0			HOST			IDE1
	(CN1)			(CN0)			(CN2)
	-----			-----			-----

       *RESET 1-----+--------1 *RESET 1--------+-----1 *RESET
		    |			       |
       *CS3FX 38----+	       *CS3FX 38----+  +----38 *CS3FX
					    |
       *CS1FX 37------------37 *CS1FX	    +-------37 *CS1FX

						 X--28  SPSYNC:CSEL

						 X--34 *PDIAG

						 X--39 *DASP

		     |\|		    |/|
	INTRQ 31-----+ +----31  INTRQ 31----+ +-----31  INTRQ
		     |/|		    |\|


Notes:

  - The diodes are there to prevent a device on e.g. IDE0 to see an interrupt
    from a device on IDE1 (Why is this neccessary? If a device gives an
    interrupt, the other device on the same chain sees it anyway).

  - *CS3FX is always HIGH on IDE0 and IDE1 (except during reset), i.e. `N' in
    the table below.

  - if *CS3FX is HIGH (`N') on HOST, IDE1 is in a high impedance state (`N N').

  - if *CS1FX is HIGH (`N') on HOST, IDE0 is in a high impedance state (`N N').

  - in `normal' cases *CS1FX is LOW (`A') on HOST and *CS3FX is HIGH (`N') on
    HOST, so only IDE0 is accessed.

  - *CS3FX can no longer be made LOW on IDE0 or IDE1, so Alternate status/
    Device control and Drive address (which wasn't used by the driver anyway)
    can no longer be accessed. I noticed that the current driver never uses
    Alternate status, but uses the normal Status (which does clear the
    interrupt) instead.


+==================================-=========================-===========+
|         Host I/O                 |                         | Drive I/O |
|         connector                |                         | connector |
|----------------------------------+-------------------------+-----------|
| HOST RESET                     1 | -----  RESET-  -------->| 1         |
|                                2 | -----  Ground  -------- | 2         |
| HOST DATA BUS BIT 7            3 |<-----  DD7  ----------->| 3         |
| HOST DATA BUS BIT 8            4 |<-----  DD8  ----------->| 4         |
| HOST DATA BUS BIT 6            5 |<-----  DD6  ----------->| 5         |
| HOST DATA BUS BIT 9            6 |<-----  DD9  ----------->| 6         |
| HOST DATA BUS BIT 5            7 |<-----  DD5  ----------->| 7         |
| HOST DATA BUS BIT 10           8 |<-----  DD10  ---------->| 8         |
| HOST DATA BUS BIT 4            9 |<-----  DD4  ----------->| 9         |
| HOST DATA BUS BIT 11          10 |<-----  DD11  ---------->| 10        |
| HOST DATA BUS BIT 3           11 |<-----  DD3  ----------->| 11        |
| HOST DATA BUS BIT 12          12 |<-----  DD12  ---------->| 12        |
| HOST DATA BUS BIT 2           13 |<-----  DD2  ----------->| 13        |
| HOST DATA BUS BIT 13          14 |<-----  DD13  ---------->| 14        |
| HOST DATA BUS BIT 1           15 |<-----  DD1  ----------->| 15        |
| HOST DATA BUS BIT 14          16 |<-----  DD14  ---------->| 16        |
| HOST DATA BUS BIT 0           17 |<-----  DD0  ----------->| 17        |
| HOST DATA BUS BIT 15          18 |<-----  DD15  ---------->| 18        |
|                               19 | -----  Ground  -------- | 19        |
|                               20 | -----  (keypin)  ------ | 20        |
| DMA REQUEST                   21 |<-----  DMARQ  --------- | 21        |
|                               22 | -----  Ground  -------- | 22        |
| HOST I/O WRITE                23 | -----  DIOW-  --------->| 23        |
|                               24 | -----  Ground  -------- | 24        |
| HOST I/O READ                 25 | -----  DIOR-  --------->| 25        |
|                               26 | -----  Ground  -------- | 26        |
| I/O CHANNEL READY             27 |<-----  IORDY  --------- | 27        |
| SPINDLE SYNC or CABLE SELECT  28 |*---- SPSYNC:CSEL  -----*| 28        |
| DMA ACKNOWLEDGE               29 | -----  DMACK-  -------->| 29        |
|                               30 | -----  Ground  -------- | 30        |
| HOST INTERRUPT REQUEST        31 |<-----  INTRQ  --------- | 31        |
| HOST 16 BIT I/O               32 |<-----  IOCS16-  ------- | 32        |
| HOST ADDRESS BUS BIT 1        33 | -----  DA1  ----------->| 33        |
| PASSED DIAGNOSTICS            34 |*-----  PDIAG-  --------*| 34        |
| HOST ADDRESS BUS BIT 0        35 | -----  DAO  ----------->| 35        |
| HOST ADDRESS BUS BIT 2        36 | -----  DA2  ----------->| 36        |
| HOST CHIP SELECT 0            37 | -----  CS1FX-  -------->| 37        |
| HOST CHIP SELECT 1            38 | -----  CS3FX-  -------->| 38        |
| DRIVE ACTIVE/DRIVE 1 PRESENT  39 |<-----  DASP-  ---------*| 39        |
|                               40 | -----  Ground  -------- | 40        |
|------------------------------------------------------------------------|
|   *Drive intercommunication signals                                    |
+========================================================================+


+===============================-==========================================+
|         Addresses             |                 Functions                |
|-------------------------------+------------------------------------------|
|      |      |     |     |     |    READ (DIOR-)     |   WRITE (DIOW-)    |
|CS1FX-|CS3FX-| DA2 | DA1 | DA0 |------------------------------------------|
|      |      |     |     |     |         Control block registers          |
|------+------+-----+-----+-----+------------------------------------------|
|  N   |  N   |  x  |  x  |  x  | Data bus high imped | Not used           |
|  N   |  A   |  0  |  x  |  X  | Data bus high imped | Not used           |
|  N   |  A   |  1  |  0  |  x  | Data bus high imped | Not used           |
|  N   |  A   |  1  |  1  |  0  | Alternate status    | Device control     |
|  N   |  A   |  1  |  1  |  1  | Drive address       | Not used           |
|-------------------------------+------------------------------------------|
|                               |        Command block registers           |
|-------------------------------+------------------------------------------|
|  A   |  N   |  0  |  0  |  0  | Data                | Data               |
|  A   |  N   |  0  |  0  |  1  | Error register      | Features           |
|  A   |  N   |  0  |  1  |  0  | Sector count        | Sector count       |
|  A   |  N   |  0  |  1  |  1  | Sector number       | Sector number      |
|  A   |  N   |  0  |  1  |  1  | * LBA bits  0- 7    | * LBA bits  0- 7   |
|  A   |  N   |  1  |  0  |  0  | Cylinder low        | Cylinder low       |
|  A   |  N   |  1  |  0  |  0  | * LBA bits  8-15    | * LBA bits  8-15   |
|  A   |  N   |  1  |  0  |  1  | Cylinder high       | Cylinder high      |
|  A   |  N   |  1  |  0  |  1  | * LBA bits 16-23    | * LBA bits 16-23   |
|  A   |  N   |  1  |  1  |  0  | Drive/head          | Drive/head         |
|  A   |  N   |  1  |  1  |  0  | * LBA bits 24-27    | * LBA bits 24-27   |
|  A   |  N   |  1  |  1  |  1  | Status              | Command            |
|  A   |  A   |  x  |  x  |  x  | Invalid address     | Invalid address    |
|--------------------------------------------------------------------------|
|                       * Mapping of registers in LBA mode                 |
+==========================================================================+

FYI, the ATA/IDE docs can be found on

    http://www.symbios.com/
    ftp://www.symbios.com/

Greetings,

						Geert

--
Geert Uytterhoeven                     Geert.Uytterhoeven@cs.kuleuven.ac.be
Wavelets, Linux/m68k on Amiga          http://www.cs.kuleuven.ac.be/~geert/
Department of Computer Science -- Katholieke Universiteit Leuven -- Belgium