Re: Amiga OS 4.0

[tikovsky@vema.cz (Lubomir Tikovsky)]

>Pro lidi nemluvici anglicky by se obsah dal shrnout asi takhle.
>Gateway pouzije novy chip, ktery zatim neni k dispozici (bude nejdrive
>v 1. ctvrtleti 1999). Pro placacky uz existuji jak simulatory, tak
>kompilery pro tenhle chip, proto bude OS 4.0 vyvijena na PC/Amiga hybridu.
>To znamena ZADNY komplet presun na PC !!!!!!.


Jestli je to ta mrska, o ktere se da docist na
http://www.microunity.com/www/  ,tak pro ni uz existuje kompletni vyvojove
prostredi a softwarovy simulator na unixove platformy (SUN, BSD UNIX 2.1).
PC tedy neni podminkou. Pro hardwarove testy ale vyrobili PCI/ISA kartu
Cerberus.

Drobny vytah zajimavych pasazi:

MicroUnity has developed a technology called mediaprocessing, which aims to
bring to digital media and communications the same software-based approach
that microprocessors brought to calculating and control systems two decades
ago. Innovations in computer architecture, software, mixed-signal circuits,
and VLSI technologies will integrate media processing at the price
thresholds needed for cost effective, volume deployment.

Mediaprocessor Technology
New mediaprocessor technologies aim to reduce this cost. One area of
innovation is execution units that systematically and efficiently implement
sub-instruction level parallelism such as SIGD (Single Instruction on Groups
of Data) over all multiprecision data types. Another is programming models
that eliminate redundant register files, condition codes, and mode bits to
simplify code generation and streamline interlocks, bypass, and exceptions
in pipelined and instruction-level parallel machines (e.g. VLIW,
superscaler, and decoupled access execution designs). A third is efficient
protection and synchronization mechanisms for the sharing of memory and data
path resources among many user-level and secure-kernel threads of execution,
enabling thread-level parallelism. A fourth is packet-oriented interfaces
compatible with multiple streams of broadband traffic across few packages at
low pin count.

These innovations harness parallelism inherent in communications. The
winning approach is modest use of each of these bandwidth-enhancing
mechanisms in a mathematically pure and concise architecture. For example, a
mediaprocessor with 128-bit SIGD 4-operand instructions, 4-way issue and
five threads would achieve about 10,000 bits of operand throughput per
cycle, compatible with very low voltage or small driver operation needed to
save power and silicon area. Efficient use of these degrees of parallelism,
moreover, are within reach of current vectorization and instruction and
thread-scheduling software technology.

What is the status and availability of mediaprocessors?
MicroUnity currently has operational prototypes of a 5-threaded
mediaprocessor implemented in 3LM, 0.6 um CMOS technology running in it's
Sunnyvale, California laboratories. These components are available for
evaluation by OEM customers